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| High Speed LAN Interface Module ELECTRONICS INC. EPF8010GM * Recommended for 10/100, 100 BX, 155 Mb/s applications * (requiring 1:1 magnetics) * Guaranteed to operate with 8 mA DC bias at 70C * * Complies with or exceeds IEEE 802.3, 10 BT/100 BX Standards * Electrical Parameters @ 25 C OCL @ 70C 100 KHz, 0.1 Vrms 8 mA DC Bias Cable Side 350H Insertion Loss (dB Max.) .1-80 MHz 80-100 MHz 100-150 MHz 1-30 MHz Return Loss (dB Min.) 30-60 MHz 60-100 MHz Common Mode Rejection (dB Min.) 1-30 MHz 30-100 MHz 100-500 MHz Crosstalk (dB Min.) [Between Channels] 5-10 MHz 10-100 MHz Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit -1 -1 -2 * -2 -3 -3 -18 -18 -12 Rcv Xmit -12 -10 Rcv Xmit Rcv Xmit Rcv Xmit Rcv -10 -38 -38 -38 -38 -10 -10 -40 -40 Isolation : 1500 Vrms * Impedance : 100 * Rise Time : 3.0 nS Max. * Schematic Transmit Channel TD- 2 3 TD+ 1 1:1 CMC* CMT* 7 TX6 CT 8 TX+ RD- 15 CT 14 1:1 RD+ 16 Receive Channel 9 RX+ 11 CT 10 RX- Package A J Pin 1 I.D. PCA EPF8010GM Date Code Dim. Min. .970 .380 .225 .700 .005 .100 .500 .018 .008 .090 0 .025 Dimensions (Inches) Max. Nom. .990 .400 .245 Typ. .015 Typ. .520 .022 .012 Typ. 8 .045 .030 .100 .092 .560 *CMC or CMT optional. (Millimeters) Min. Max. Nom. 24.64 9.65 5.72 17.78 .127 2.54 12.7 .457 .203 2.28 0 .635 25.15 10.16 6.22 Typ. .381 Typ. 13.20 .559 .305 Typ. 8 1.14 .762 2.54 2.34 14.22 N Pad Layout B Q P D E M C K L I A B C D E F G H I J K L M N P Q H F G PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8010GMa Rev. B 5/15/97 Product performance is limited to specified parameters. Data is subject to change without prior notice. TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pca.com High Speed LAN Interface Module ELECTRONICS INC. EPF8010GM The circuit below is a guideline for interconnecting PCA's EPF8010GM with a typical 100 BX PHY chip for 100 Mb/s applications over UTP cable. Further details of system design, such as chip pin-out, etc. should be obtained from the specific chip manufacturer. Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded signals in 100/155 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust the specific chip preset template control resistors to get at least 2.12V pk-pk across the transmit side input pins. It is recommended that system designers do not ground the receiver side center tap, via a capacitor. This may worsen EMI, specifically if the secondary "common mode termination" is pulled to chassis ground as shown. The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. Their placement and use are to be considered carefully before a design is finalized. The "common mode termination" load of 75 shown from the center taps of the secondary may be taken to chassis ground via a suitable cap. This depends upon the user's design, EMI margin, etc. It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit the plane off at least 0.05 inches away from the chip side pins of EPF8010GM. There need not be any ground plane beyond this point. For best results, the PCB designer should design the outgoing traces preferably to be 50 , balanced and well coupled to achieve minimum radiation from these traces. Typical Application Circuit for 100 BX over UTP RX+ 110 16 10 9 1 2 3 6 RX- 15 14 8 7 RJ45* 100BX PHY TX+ TX49.9 49.9 1 2 6 75 75 3 11 .01 2 kV .01 2 kV EPF8010GM +5 V 0.1 0.1 0.1 Notes : * Pin-outs shown are for DCE configurations : e.g. Hubs, Repeaters PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8010GMb Rev. B 5/15/97 TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pca.com |
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